Heuristics for Irreversible Ternary MVL Circuit Synthesis and Optimization Using PSO Algorithm

Abstract

This article proposed some heuristics in synthesis and optimization of ternary irreversible logic circuit with Particle Swarm Optimization (PSO) algorithm. Some of benchmark irreversible circuits such as full adder and multiplier are synthesis using the method proposed in this research. Number of gate are merit to compare the performance of different irreversible logic circuit. The result, presented in this dissertation, indicate efficiency of the proposed method to synthesis of irreversible ternary circuit.